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  ds-07; sep. 04, 2009 copyright ? zilltek technology corp. - 1 - ZT7184 5f, no.2, industry e. 9 th rd., science-based industrial park, hsinchu 30075 taiwan tel: (886) 3577 7509; fax: (886) 3577 7390 email : sales@zilltek.com 3a, 23v, 340khz, synchronous step-down dc/dc converter features 4.75v to 23v input voltage output adjustable from 0.925v to 20v output current up to 3a integrated 85m power mosfet switches shutdown current 1 a typical efficiency up to 95% 340khz fixed frequency programmable soft start over current protection over temperature protection rohs compliant and 100% lead (pb) free applications fpga, dsp, asic power supplies notebook computers green electronics or appliance ordering information part package rohs ship, quantity ZT7184s sop-8l(ep) yes tape and reel description the ZT7184 is a 340khz fixed frequency pwm synchronous step-down regulator. the ZT7184 is operated from 4.75v to 23v, the generated output is adjustable from 0.925v to 20v, and the output current can be up to 3a. the integrated two mosfet switches is with turn on resistance of 85m . current mode control provides fast transient response and cycle-by-cycle over current protection. the shutdown current is 1 a typical. adjustable soft start prevents inrush current at turn on. the ZT7184 is with thermal shutdown. the ZT7184 is available in the sop-8l package, and it is rohs compliant and 100% lead (pb) free. pins configuration typical application circuit zilltek confidential free datasheet http:///
ds-07; sep. 04, 2009 copyright ? zilltek technology corp. - 2 - ZT7184 5f, no.2, industry e. 9 th rd., science-based industrial park, hsinchu 30075 taiwan tel: (886) 3577 7509; fax: (886) 3577 7390 email : sales@zilltek.com absolute maximum ratings supply voltage v in .... C 0.3v to +24v switch v sw C 1v to v in +0.3v boost v bs . v sw C 0.3v to v sw +6v all other pins C 0.3v to +6v junction temperature . +150 c lead temperature .. +260 c operating temperature range ... C 20 c to +85 c storage temperature range ....... C 65 c to +150 c caution : stresses above those listed in absolute maximum ratings may cause permanent damage to the device. this is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. electro-static discharge sensitivity this integrated circuit can be damaged by esd. it is recommended that all integrated circuits be handled with proper precautions. failure to observe proper handling and installation procedures can cause damage. esd damage can range from subtle performance degradation to complete device failure. package thermal characteristics thermal resistance, ja . 50 c/w thermal resistance, jc . 10 c/w pins description pin symbol description 1 bs high-side gate drive boost input. 2 in power input. 3 sw power switching output. 4 gnd ground. 5 fb feedback input. 6 comp compensation node. 7 en enable input. 8 ss s oft start control input. functional block diagram zilltek confidential free datasheet http:///
ds-07; sep. 04, 2009 copyright ? zilltek technology corp. - 3 - ZT7184 5f, no.2, industry e. 9 th rd., science-based industrial park, hsinchu 30075 taiwan tel: (886) 3577 7509; fax: (886) 3577 7390 email : sales@zilltek.com electrical specifications (t a = +25 c, v in = +12v, unless otherwise noted.) parameter symbol test conditions min typ max unit supply voltage v in 4. 75 23 v output voltage v out 0.925 20 v shutdown supply current v en = 0v 0. 3 3.0 a supply current v en = 2.0v, v fb = 1.0 v 1. 3 1.5 ma feedback voltage v fb 4.75v v in 23v 0.900 0.925 0.950 v feedback over-voltage threshold 1. 1 v error amplifier voltage gain * a ea 400 v/v error amplifier transconductance g ea i c = 10 a 820 a/v high-side switch-on resistance * r ds(on)1 85 m low-side switch-on resistance * r ds(on)2 85 m high-side switch leakage current v en = 0v, v sw = 0 v 0 10 a upper switch current limit minimum duty cycle 3. 8 5. 3 a lower switch current limit from drain to sourc e 0. 9 a comp to current sense transconductanc e g cs 5. 2 a/v oscillation frequency f osc1 300 340 380 khz short circuit oscillation frequency f osc2 v fb = 0v 110 khz maximum duty cycle d max v fb = 1.0 v 90 % minimum on time * t on 220 ns en shutdown threshold voltage v en rising 1. 1 1. 5 2.0 v en shutdown threshold voltage hysteresi s 220 mv en lockout threshold voltage 2. 2 2. 5 2.7 v en lockout hysteresis 210 mv input under voltage lockout threshol d v in rising 3. 80 4. 05 4.40 v input under voltage lockout threshold hysteresis 210 mv soft-start current v ss = 0v 6 a soft-start period c ss = 0.1 f 15 ms thermal shutdown * 160 c * guaranteed by design, not tested. zilltek confidential free datasheet http:///
ds-07; sep. 04, 2009 copyright ? zilltek technology corp. - 4 - ZT7184 5f, no.2, industry e. 9 th rd., science-based industrial park, hsinchu 30075 taiwan tel: (886) 3577 7509; fax: (886) 3577 7390 email : sales@zilltek.com application information overview the ZT7184 is a synchronous rectified, current-mode, step-down regulator. it regulates input voltages from 4.75v to 23v down to an output voltage as low as 0.925v, and supplies up to 3a of load current. the ZT7184 uses current-mode control to regulate the output voltage. the output voltage is measured at fb through a resistive voltage divider and amplified through the internal transconductance error amplifier. the voltage at the comp pin is compared to the switch current measured internally to control the output voltage. the converter uses internal n-channel mosfet switches to step-down the input voltage to the regulated output voltage. since the high side mosfet requires a gate voltage greater than the input voltage, a boost capacitor connected between sw and bs is needed to drive the high side gate. the boost capacitor is charged from the internal 5v rail when sw is low. when the ZT7184 fb pin exceeds 20% of the nominal regulation voltage of 0.925v, the over voltage comparator is tripped and the comp pin and the ss pin are discharged to gnd, forcing the high-side switch off. pins description bs: high-side gate drive boost input. bs supplies the drive for the high-side n-channel mosfet switch. connect a 0.01 f or greater capacitor from sw to bs to power the high side switch. in: power input. in supplies the power to the ic, as well as the step-down converter switches. drive in with a 4.75v to 23v power source. bypass in to gnd with a suitably large capacitor to eliminate noise on the input to the ic. sw: power switching output. sw is the switching node that supplies power to the output. connect the output lc filter from sw to the output load. note that a capacitor is required from sw to bs to power the high-side switch. gnd: ground. connect the exposed pad to this gnd. fb: feedback input. fb senses the output voltage to regulate that voltage. drive fb with a resistive voltage divider from the output voltage. the feedback threshold is 0.925v. comp: c ompensation node. comp is used to compensate the regulation control loop. connect a series rc network from comp to gnd to compensate the regulation control loop. in some cases, an additional capacitor from comp to gnd is required. en: enable input. en is a digital input that turns the regulator on or off. drive en high to turn on the regulator, drive it low to turn it off. pull up with 100k resistor for automatic startup. ss: soft-start control input. ss controls the soft start period. connect a capacitor from ss to gnd to set the soft-start period. a 0.1 f capacitor sets the soft-start period to 15ms. to disable the soft-start feature, leave ss unconnected. setting the output voltage the output voltage is set using a resistive voltage divider from the output voltage to fb pin. the voltage divider divides the output voltage down to the feedback voltage by the ratio: v fb = v out r2 / (r1 + r2) where v fb is the feedback voltage and v out is the output voltage. thus the output voltage is: v out = 0.925 (r1 + r2) / r2 r2 can be as high as 100k , but a typical value is 10k . using the typical value for r2, r1 is determined by: r1 = 10.81 (v out ? 0.925) (k ) inductor the inductor is required to supply constant current to the output load while being driven by the switched input voltage. a larger value inductor will result in less ripple current that will result in lower output ripple voltage. however, the larger value inductor will have a larger physical size, higher series resistance, and/or lower saturation current. a good rule for determining the inductance to use is to allow the peak-to-peak ripple current in the inductor to be approximately 30% of the zilltek confidential free datasheet http:///
ds-07; sep. 04, 2009 copyright ? zilltek technology corp. - 5 - ZT7184 5f, no.2, industry e. 9 th rd., science-based industrial park, hsinchu 30075 taiwan tel: (886) 3577 7509; fax: (886) 3577 7390 email : sales@zilltek.com maximum switch current limit. also, make sure that the peak inductor current is below the maximum switch current limit. the inductance value can be calculated by: l = [ v out / (f s i l ) ] (1 ? v out /v in ) where v out is the output voltage, v in is the input voltage, f s is the switching frequency, and i l is the peak-to-peak inductor ripple current. choose an inductor that will not saturate under the maximum inductor peak current. the peak inductor current can be calculated by: i lp = i load + [ v out / (2 f s l) ] (1 ? v out /v in ) where i load is the load current. the choice of which style inductor to use mainly depends on the price vs. size requirements and any emi requirements. optional schottky diode during the transition between high-side switch and low-side switch, the body diode of the low-side power mosfet conducts the inductor current. the forward voltage of this body diode is high. an optional schottky diode may be paralleled between the sw pin and gnd pin to improve overall efficiency. table 1 lists example schottky diodes and their manufacturers. part number voltage and current rating vendor b 130 30v, 1a diodes inc. sk 13 30v, 1a diodes inc. mbrs130 30v, 1a international rectifier table 1: diode selection guide. input capacitor the input current to the step-down converter is discontinuous, therefore a capacitor is required to supply the ac current to the step-down converter while maintaining the dc input voltage. use low esr capacitors for the best performance. ceramic capacitors are preferred, but tantalum or low-esr electrolytic capacitors may also suffice. choose x5r or x7r dielectrics when using ceramic capacitors. since the input capacitor (c1) absorbs the input switching current it requires an adequate ripple current rating. the rms current in the input capacitor can be estimated by: i c1 = i load [ (v out /v in ) (1 ? v out /v in ) ] 1/2 the worst-case condition occurs at v in = 2v out , where i c1 = i load /2. for simplification, choose the input capacitor whose rms current rating greater than half of the maximum load current. the input capacitor can be electrolytic, tantalum or ceramic. when using electrolytic or tantalum capacitors, a small, high quality ceramic capacitor, i.e. 0.1 f, should be placed as close to the ic as possible. when using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at input. the input voltage ripple for low esr capacitors can be estimated by: v in = [ i load /(c1 f s ) ] (v out /v in ) (1 ? v out /v in ) where c1 is the input capacitance value. output capacitor the output capacitor is required to maintain the dc output voltage. ceramic, tantalum, or low esr electrolytic capacitors are recommended. low esr capacitors are preferred to keep the output voltage ripple low. the output voltage ripple can be estimated by: v out = [ v out /(f s l) ] (1 ? v out /v in ) [ r esr + 1 / (8 f s c2) ] where c2 is the output capacitance value and r esr is the equivalent series resistance (esr) value of the output capacitor. in the case of ceramic capacitors, the impedance at the switching frequency is dominated by the capacitance. the output voltage ripple is mainly caused by the capacitance. for simplification, the output voltage ripple can be estimated by: v out = [ v out /(8 f s 2 l c2) ] (1 ? v out /v in ) in the case of tantalum or electrolytic capacitors, the esr dominates the impedance at the switching frequency. for simplification, the output ripple can be approximated to: v out = [ v out /(f s l) ] (1 ? v out /v in ) r esr the characteristics of the output capacitor also affect the stability of the regulation system. the ZT7184 can be optimized for a wide range of capacitance and esr values. compensation components ZT7184 employs current mode control for easy zilltek confidential free datasheet http:///
ds-07; sep. 04, 2009 copyright ? zilltek technology corp. - 6 - ZT7184 5f, no.2, industry e. 9 th rd., science-based industrial park, hsinchu 30075 taiwan tel: (886) 3577 7509; fax: (886) 3577 7390 email : sales@zilltek.com compensation and fast transient response. the system stability and transient response are controlled through the comp pin. comp pin is the output of the internal transconductance error amplifier. a series capacitor and resistor combination sets a pole-zero combination to control the characteristics of the control system. the dc gain of the voltage feedback loop is given by: a vdc = r load g cs a ea v fb /v out where a ea is the error amplifier voltage gain; g cs is the current sense transconductance and r load is the load resistor value. the system has two poles of importance. one is due to the compensation capacitor (c3) and the output resistor of the error amplifier, and the other is due to the output capacitor and the load resistor. these poles are located at: f p1 = g ea / (2 c3 a ea ) f p2 = 1 / (2 c2 r load ) where g ea is the error amplifier transconductance. the system has one zero of importance, due to the compensation capacitor (c3) and the compensation resistor (r3). this zero is located at: f z1 = 1 / (2 c3 r3) the system may have another zero of importance, if the output capacitor has a large capacitance and/or a high esr value. the zero, due to the esr and capacitance of the output capacitor, is located at: f esr = 1 / (2 c2 r esr ) in this case, a third pole set by the compensation capacitor (c6) and the compensation resistor (r3) is used to compensate the effect of the esr zero on the loop gain. this pole is located at: f p3 = 1 / (2 c6 r3) the goal of compensation design is to shape the converter transfer function to get a desired loop gain. the system crossover frequency where the feedback loop has the unity gain is important. lower crossover frequencies result in slower line and load transient responses, while higher crossover frequencies could cause system instability. a good rule of thumb is to set the crossover frequency below one-tenth of the switching frequency. to optimize the compensation components, the following procedure can be used. 1. choose the compensation resistor (r3) to set the desired crossover frequency. determine the r3 value by the following equation: r3 = [ (2 c2 f c ) / (g ea g cs ) ] (v out /v fb ) < [ (2 c2 0.1 f s ) / (g ea g cs ) ] (v out /v fb ) where f c is the desired crossover frequency which is typically below one tenth of the switching frequency. 2. choose the compensation capacitor (c3) to achieve the desired phase margin. for applications with typical inductor values, setting the compensation zero, f z1 , below one-forth of the crossover frequency provides sufficient phase margin. determine the c3 value by the following equation: c3 > 4 / (2 r3 f c ) where r3 is the compensation resistor. 3. determine if the second compensation capacitor (c6) is required. it is required if the esr zero of the output capacitor is located at less than half of the switching frequency, or the following relationship is valid: 1 / (2 c2 r esr ) < f s /2 if this is the case, then add the second compensation capacitor (c6) to set the pole f p3 at the location of the esr zero. determine the c6 value by the equation: c6 = (c2 r esr ) / r3 external bootstrap diode an external bootstrap diode may enhance the efficiency of the regulator, the applicable conditions of external bs diode are: v out = 5v or 3.3v; and duty cycle is high: d = v out /v in > 65% in these cases, an external bs diode is recommended from the output of the voltage regulator to bs pin, as shown in figure 1. figure 1: add optional external bootstrap diode to enhance efficiency. the recommended external bs diode is in4148, and the bs capacitor is 0.1 ~ 1 f. pcb layout guide zilltek confidential free datasheet http:///
ds-07; sep. 04, 2009 copyright ? zilltek technology corp. - 7 - ZT7184 5f, no.2, industry e. 9 th rd., science-based industrial park, hsinchu 30075 taiwan tel: (886) 3577 7509; fax: (886) 3577 7390 email : sales@zilltek.com pcb layout is very important to achieve stable operation. please follow the guidelines below. 1) keep the path of switching current short and minimize the loop area formed by input capacitor, high-side mosfet and low-side mosfet. 2) bypass ceramic capacitors are suggested to be put close to the v in pin. 3) ensure all feedback connections are short and direct. place the feedback resistors and compensation components as close to the chip as possible. 4) rout sw away from sensitive analog areas such as fb. 5) connect in, sw, and especially gnd respectively to a large copper area to cool the chip to improve thermal performance and long-term reliability. zilltek confidential free datasheet http:///
ds-07; sep. 04, 2009 copyright ? zilltek technology corp. - 8 - ZT7184 5f, no.2, industry e. 9 th rd., science-based industrial park, hsinchu 30075 taiwan tel: (886) 3577 7509; fax: (886) 3577 7390 email : sales@zilltek.com package dimensions sop-8l(ep) dimension (mm) dimension (inch) symbols min max min max a 1. 30 1.70 0. 051 0.067 a1 0. 00 0.15 0. 000 0.006 a2 1. 25 1.52 0. 049 0.060 b 0. 33 0.51 0. 013 0.020 c 5. 80 6.20 0. 228 0.244 d 4. 80 5.00 0. 189 0.197 d1 3. 15 3.45 0. 124 0.136 e 3. 80 4.00 0. 150 0.157 e1 2. 26 2.56 0. 089 0.101 e 1.27 bsc 0.050 bsc h 0. 19 0.25 0.00 75 0.0098 l 0. 41 1.27 0. 016 0.050 0 8 0 8 d e c e b a a1 a2 l h d 1 e1 t op view bottom view exposed pad zilltek confidential free datasheet http:///


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